Google Sunnyvale, CA, USA

Princeton University Princeton,  New Jersey,  USA

Ph.D in Electrical Engineering
Advisors : Margaret Martonosi and Juan Luis Aragon
Dissertation : Efficient data accesses in accelerator-based heterogeneous architecture

Duke University Durham,  North Carolina,  USA

Bachelor of Science in Electrical and Computer Engineering (GPA : 3.95 / 4.00)
Summa Cum Laude with Distinction in Electrical and Computer Engineering

Seoul National University Seoul,  Republic of Korea

Supervisor: Jae W. Lee
Software-hardware co-design for emerging applications,  and data access optimizations across systems and architectures.
This position also fulfills mandatory military service duty required for all Korean men.

Microsoft Research Cambridge,  UK

Collaborator: Stavros Volos
Research on an efficient secure memory design with near-data computation

Intel Labs Santa Clara,  California,  USA

Collaborator: Professor Lisa Wu (Now at Duke University)
Research on a custom hardware accelerator for graph analytics application

AMD Research Austin,  Texas,  USA

Collaborator: Joseph L. Greathouse,  Mitesh Meswani and Nuwan Jayasena
Research on a mobile high-performance energy-efficient heterogeneous system consists of large, low memory bandwidth processors and small,  high memory bandwidth processors.

Samsung Advanced Institute of Technology Seoul,  Republic of Korea

Collaborator: Woong Seo and Yeon-Gon Cho
Research on various techniques to reduce the performance/energy impact of GPU branch/memory divergence.

Systems Architecture Integration Lab. Duke University,  Durham,  North Carolina,  USA

Advisor: Professor Benjamin. C. Lee(Now at UPenn)
Research on efficient control and management of the heterogeneous memory system.

An LSM Tree Augmented with B+ Tree on Nonvolatile Memory

Yunho Jin,  Shine Kim,  Tae Jun Ham,  and Jae W. Lee
ACM Transactions on Storage (TOS)

Retrospective: Genesis: A Hardware Acceleration Framework for Genomic Data Analysis

Lisa Wu Wills,  Tae Jun Ham,  Jae W. Lee,  and Krste Asanovic
ISCA@50 25-year Retrospective: 1996-2020
98 papers were selected out of 1000+ papers across 25-years of ISCA history

L3: Accelerator-Friendly Lossless Image Format for High-Resolution, High-Throughput DNN Training

Jonghyun Bae,  Woohyeon Baek,  Tae Jun Ham,  and Jae W. Lee
European Conference on Computer Vision (ECCV)
Acceptance rate: 1650/5803=28(%)

Architecting a Flash-based Storage System for Low-cost Inference of Extreme-scale DNNs

Yunho Jin,  Shine Kim,  Tae Jun Ham,  and Jae W. Lee
IEEE Transactions on Computers (TC)

MaPHeA: A Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation

Deok-Jae Oh,  Yaebin Moon,  Do Kyu Ham,  Tae Jun Ham,  Yongjun Park,  Jae W. Lee,  Jung Ho Ahn,  and Eojin Lee
ACM Transactions on Embedded Computing Systems (TECS)

ULPPACK: Fast Sub-8-bit Matrix Multiply on Commodity SIMD Hardware

Jaeyeon Won,  Jeyeon Si,  Sam Son,  Tae Jun Ham,  and Jae W. Lee
The 5th Conference on Machine Learning and Systems (MLSys)

ANNA: Specialized Architecture for Approximate Nearest Neighbor Search

Yejin Lee,  Hyunji Choi,  Sunhong Min,  Hyunseung Lee,  Sangwon Baek,  Dawoon Jeong,  Jae W. Lee,  and Tae Jun Ham (Co-corresponding)
The 28th IEEE International Symposium on High-Performance Computer Architecture (HPCA)
Acceptance rate: 80/262=30(%)

Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh

Michael Jaemin Kim,  Jaehyun Park,  Yeonhong Park,  Wanju Doh,  Namhoon Kim,  Tae Jun Ham,  Jae W. Lee,  and Jung Ho Ahn
The 28th IEEE International Symposium on High-Performance Computer Architecture (HPCA)
Acceptance rate: 80/262=30(%)

ASAP: Fast Mobile Application Switch via Adaptive Prepaging

Sam son,  Seung Yul Lee,  Yunho Jin,  Jonghyun Bae,  Jinkyu Jeong,  Tae Jun Ham,  Jae W. Lee,  Hongil Yoon
USENIX Annual Technical Conference (ATC)
Acceptance rate: 64/341=19(%)

MaPHeA: A Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation

Deok-Jae Oh,  Yaebin Moon,  Eojin Lee,  Tae Jun Ham,  Jae W. Lee,  Jung Ho Ahn
ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Accelerating Genomic Data Analytics with Composable Hardware Acceleration Framework

Tae Jun Ham,  David Bruns-Smith,  Brendan Sweeney,  Yejin Lee,  Seong Hoon Seo,  U Gyeong Song,  Young H. Oh,  Krste Asanovic,  Jae W. Lee,  Lisa Wu
IEEE Micro
Special Issue on Top Picks from the 2020 Computer Architecture Conferences

ELSA: Hardware-Software Co-design for Efficient, Lightweight Self-Attention Mechanism in Neural Networks [Link]

Tae Jun Ham*,  Yejin Lee*,  Seong Hoon Seo,  Soosung Kim,  Hyunji Choi,  Sung Jun Jung,  Jae W. Lee
The 47th ACM/IEEE International Symposium on Computer Architecture (ISCA)
Acceptance rate: 76/406=19(%)
(*Equal Contributions)

BOSS: Bandwidth-Optimized Search Accelerator for Storage-Class Memory [Link]

Jun Heo,  Seungyul Lee,  Sunhong Min,  Yeonhong Park,  Sung Jun Jung,  Tae Jun Ham,  Jae W. Lee
The 47th ACM/IEEE International Symposium on Computer Architecture (ISCA)
Acceptance rate: 76/406=19(%)

MERCI: Efficient Embedding Reduction on Commodity Hardware via Sub-Query Memoization [Link]

Yejin Lee,  Seong Hoon Seo,  Hyunji Choi,  Hyoung Wook Sul,  Soosung Kim,  Jae W. Lee, Tae Jun Ham (Corresponding Author)
The 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Acceptance rate: 75/398=19(%)

FlashNeuron: SSD Enables Large-Batch Training of Very Deep Neural Networks [Link]

Jonghyun Bae,  Jongsung Lee,  Yunho Jin,  Sam Son,  Shine Kim,  Hakbeom Jang,  Tae Jun Ham,  Jae W. Lee
USENIX Conference on File and Storage Technologiess (FAST)
Acceptance rate: 28/130=21(%)

Behemoth: A Flash-centric Training Accelerator for Extreme-scale DNNs [Link]

Shine Kim*,  Yunho Jin*,  Gina Sohn,  Jonghyun Bae,  Tae Jun Ham,  Jae W. Lee
USENIX Conference on File and Storage Technologiess (FAST)
Acceptance rate: 28/130=21(%)
(*Equal Contributions)

Layerweaver: Maximizing Resource Utilization of Neural Processing Units via Layer-Wise Scheduling [Link]

Young H. Oh,  Seonghak Kim, Yunho Jin, Sam Son, Jonghyun Bae, Jongsung Lee, Yeonhong Park, Dong Uk Kim,Tae Jun Ham,  Jae W. Lee
The 27th IEEE International Symposium on High Performance Computer Architecture (HPCA)
Acceptance rate: 63/258=24(%)

Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator [Link]

Yeonhong Park,  Seung Yul Lee,  Hoon Shin,  Jun Heo,  Tae Jun Ham,  Jae W. Lee
The 39th IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
Acceptance rate: 127/470=27(%)

Graphene: Strong yet Lightweight Row Hammer Protection [Link]

Yeonhong Park,  Woosuk Kwon,   Eojin Lee,  Tae Jun Ham,  Jung Ho Ahn,  Jae W. Lee
The 53rd IEEE/ACM International Symposium on Microarchitecture (MICRO)
Acceptance rate: 82/424=19(%)
IEEE MICRO Top Picks Honorable Mention (one of the top 24 computer architecture papers of 2020)

MosaicSim: A Lightweight,  Modular Simulator for Heterogeneous Systems [Link][Extended Technical Report]

Opeoluwa Matthews,  Aninda Manocha,  Davide Giri,  Marcelo Orenes-Vera,  Esin Tureci,  Tyler Sorensen,  Tae Jun Ham,  Juan L. Aragon,  Luca P. Carloni,  Margaret Martonosi
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
Acceptance rate: 25/73=34(%)
Best Paper Award Nominee

Genesis: A Hardware Acceleration Framework for Genomic Data Analysis [Link][Slide]

Tae Jun Ham,  David Bruns-Smith,  Brendan Sweeney,  Yejin Lee,  Seong Hoon Seo,  U Gyeong Song,  Young H. Oh,  Krste Asanovic,  Jae W. Lee,  Lisa Wu
The 47th ACM/IEEE International Symposium on Computer Architecture (ISCA)
Acceptance rate: 77/428=18(%)
IEEE MICRO Top Picks (one of the top 12 computer architecture papers of 2020)

A Specialized Architecture for Object Serialization with Applications to Big Data Analytics [Link]

Jaeyoung Jang,  Sung Jun Jung,  Sunmin Jeong,  Jun Heo,  Hoon Shin,  Tae Jun Ham,  Jae W. Lee
The 47th ACM/IEEE International Symposium on Computer Architecture (ISCA)
Acceptance rate: 77/428=18(%)

A Case for Hardware-based Demand Paging [Link]

Gyusun Lee*,  Wenjing Jin*,  Wonsuk Song,  Jeonghun Gong,  Jonghyun Bae,  Tae Jun Ham,  Jae W. Lee,  Jinkyu Jeong
The 47th ACM/IEEE International Symposium on Computer Architecture (ISCA)
Acceptance rate: 77/428=18(%)
(*Equal Contributions)

IIU: Specialized Architecture for Inverted Index Search [Link]

Jun Heo,  Jaeyeon Won,  Yejin Lee,  Shivam Bharuka,  Jaeyoung Jang,  Tae Jun Ham,  Jae W. Lee
The 25th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Acceptance rate: 86/476=18(%)

A³: Accelerating Neural Network Attention Mechanism with Approximation [Link] [Slide]

Tae Jun Ham,  Sung Jun Jung,  Seonghak Kim,  Young H. Oh,  Yoon Ho Song,  Junghoon Park,  Sanghee Lee,  Kyoung Park,  Jae W. Lee,  Deog-Kyoon Jeong
The 26th IEEE International Symposium on High Performance Computer Architecture (HPCA)
Acceptance rate: 48/235=20(%)

Charon: Specialized Near-Memory Processing Architecture for Clearing Dead Objects in Memory [Link]

Jaeyoung Jang,  Jun Heo,  Yejin Lee,  Jaeyeon Won,  Seonghak Kim,  Sung Jun Jung,  Hakbeom Jang,  Tae Jun Ham,  Jae W. Lee
The 52nd IEEE/ACM International Symposium on Microarchitecture (MICRO)
Acceptance rate: 79/344=23(%)

SSDStreamer: Specializing I/O Stack for Large-Scale Machine Learning [Link]

Jonghyun Bae,  Hakbeom Jang,  Jeonghun Gong,  Wenjing Jin,  Shine Kim,  Jaeyoung Jang,  Tae Jun Ham,  Jinkyu Jeong,  Jae W. Lee
IEEE Micro,  Sep/Oct 2019

Asynchronous I/O Stack: A Low-latency Kernel I/O Stack for Ultra-Low Latency SSDs [Link]

Gyusun Lee,  Seokha Shin,  Wonsuk Song,  Tae Jun Ham,  Jae W. Lee,  Jinkyu Jeong
2019 USENIX Annual Technical Conference (ATC)
Acceptance rate: 71/356=20(%)

Practical Erase Suspension for Modern Low-latency SSDs [Link]

Shine Kim,  Jonghyun Bae,  Hakbeom Jang,  Wenjing Jin,  Jeonghun Gong,  Seungyeon Lee,  Tae Jun Ham,  Jae W. Lee
2019 USENIX Annual Technical Conference (ATC)
Acceptance rate: 71/356=20(%)

Efficient Data Supply for Parallel Heterogeneous Architectures [Link]

Tae Jun Ham,  Juan Luis Aragon,  Margaret Martonosi
ACM Transactions on Architecture and Code Optimization (TACO)

Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures [Link]

Tae Jun Ham,  Juan Luis Aragon,  Margaret Martonosi
ACM Transactions on Architecture and Code Optimization (TACO)

Graphicionado: A High-Performance and Energy Efficient Accelerator for Graph Analytics [Link] [Slide]

Tae Jun Ham,  Lisa Wu,  Narayanan Sundaram,  Nadathur Satish,  Margaret Martonosi
The 49th IEEE/ACM International Symposium on Microarchitecture (MICRO)
Acceptance rate: 61/283=22(%)
Best Paper Award

DeSC: Decoupled Supply-Compute Communication Management for Heterogeneous Architectures [Link]

Tae Jun Ham,  Juan Luis Aragon,  Margaret Martonosi
The 48th IEEE/ACM International Symposium on Microarchitecture (MICRO)
Acceptance rate: 61/283=22(%)
IEEE MICRO Top Picks Honorable Mention (Top 23 computer architecture papers of 2015)
Motivated $5.8million DARPA-funded DECADES project

Disintegrated control for energy-efficient and heterogeneous memory systems [Link]

Tae Jun Ham,  Bharath K.Chelepalli,  Neng Xue,  Benjamin C.Lee
The 19th IEEE International Symposium on High Performance Computer Architecture (HPCA)
Acceptance rate: 51/249=20(%)